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Specialisable, Programmable, Efficient and Robust Microprocessors (SPEAR)
Start date: Sep 1, 2012, End date: May 31, 2018 PROJECT  FINISHED 

The development of faster, cheaper and smaller transistors has been the driving force behind the exponential growth in computing power over the past 50 years. While our ability to fabricate better transistors has not yet ceased, continuing to translate these advances into better system-level performance is now a major challenge. This proposal seeks to research a new approach to building programmable digital systems, one that can offer the efficiency, robustness and flexibility required as we approach the end of the CMOS era and start to introduce new post-CMOS technologies. The ideas are centred upon a novel network-centric multiprocessor architecture, with contributions planned at every level from the circuit to the language level.

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