Nowadays, microelectronics set the pace for the whole knowledge-based economy and society in terms of the ever rising demand for mobile devices and the exponentially growing internet data transfer. However, the widening gap between the increasing number of transistors on a single Si chip and the delivered performance indicates the approaching limits of classical device scaling. Additionally, this miniaturization results in severe energy dissipation in the interconnection of devices. A smart way to overcome this emerging power consumption crisis is to avoid heating by replacing the on-chip and/or chip-to-chip electrical interconnects with optical interconnects. Due to their direct bandgap, III-V compounds are ideal for the integration of photonics with Si-based electronics on the very same chip. This would enable large-scale optoelectronics integration hindered so far by coupling- and overlay issues introduced by state-of-the-art III-V bonding on Silicon. MODES will develop and investigate a novel approach for self-aligned monolithic integration of active and passive III-V optoelectronic devices on a Silicon platform. It focuses on the optimization of GaAs- and InP-based III-V growth within customized oxide templates. Moreover, this research aims at designing and fabricating doped, defect-free III-V heterostructures for electrically-driven optoelectronic devices integrated on Si. Owing to his experience in epitaxy as well as fabrication and characterization of group IV photonics, i.e. laser devices, the fellow complements ideally the competences of the group in III-V epitaxy and fabrication as well as knowledge of design and characterization of optoelectronic devices. Three objectives will be pursued: 1) Growth and integration of III-V material with Si-on-insulator waveguides 2) Design and fabrication of passive and active photonic devices based on integrated III-V materials and Si waveguides 3) Optical and electrical characterization of the photonic components.