Terabit-on-chip:\nmicro and nano-scale silicon pho.. (BOOM)
Terabit-on-chip:\nmicro and nano-scale silicon photonic integrated components and sub-systems enabling Tb/s-capacity, scalable and fully integrated photonic routers
(BOOM)
Start date: May 1, 2008,
End date: Sep 30, 2011
PROJECT
FINISHED
BOOM is an integration project that aims to pursue the systematic advancement of Silicon-on-Insulator (SOI) integration technology to develop compact, cost-effective and power efficient silicon photonic components that enable photonic Tb/s capacity systems for current and new generation high speed broadband core networks. BOOM develops fabrication techniques as well as flip-chip bonding and wafer-scale integration methods to fabricate and mount the complete family of III-V components on SOI boards including: arrays of Semiconductor Optical Amplifiers, monolithic blocks of Electro-absorption modulated lasers (EMLs) and highly efficient photodetectors. As such the BOOM SOI optical board technology will be able to blend the cost-effectiveness and integration potential of silicon with the high bandwidth and processing power of III-V material and provide a new generation of functional and miniaturized photonic components including: (a) a single 160 Gb/s SOI Wavelength Converter (WC) and a quadruple array of 160 Gb/s WCs with a record chip throughput of 640 Gb/s on a size 20x5 mm2 , (b) a compact, eight channel, ultra dense WDM InAlAs-InGaAs photoreceiver with record high responsivity and (c) a dual SOI EML transmitter together with its electronic drivers on a single chip. In addition, BOOM invests in the development of improved CMOS compatible waveguide technologies to fabricate miniaturized, low loss and fully reconfigurable wavelength routing cross-connects based on two dimensional grids of serially interconnected micro-ring resonators. BOOM will perform system level integration of all these components to assemble the first prototype rack-mount, ultra-high capacity routing platform based on silicon photonics that will require minimum board space and power consumption and achieve a total throughput of 640 Gb/s. The platform will be evaluated in a network operator test bed employing GbE optical signals.
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