Engineers who design hard real-time embedded systems express a need for several times the performance available today while keeping safety as major criterion. A breakthrough in performance is expected by parallelising hard real-time applications. parMERASA targets a timing analysable system of parallel hard real-time applications running on a scalable multi-core processor. Several new scientific and technical challenges will be tackled in the light of timing analysability: parallelisation techniques for industrial applications, operating system virtualisation and efficient synchronisation mechanisms, guarantee of worst-case execution times (WCET) of parallelised applications, verification and profiling tools, and scalable memory hierarchies together with I/O systems for multi-core processors.The output of parMERASA will be at least an eightfold performance improvement of the WCET for parallelised legacy applications in avionics, automotive, and construction machinery domains in comparison to the original sequential versions. The execution platform, i.e. the parMERASA multi-core processor and system software, will provide temporal and spatial isolation between tasks and scale up to 64 cores. A software engineering approach will be taken targeting at least four parallel execution patterns that are analysable. Verification and profiling tools will be developed, and we aim to provide at least four recommendations to enhance both automotive and avionic standards.parMERASA will impact new products for transportation systems and industrial applications. It will impact standards by introducing parallel execution and time predictability as key features. This will contribute to reinforce the EC position in the field of critical computing systems and yield an advantage for European industry in the highly competitive avionics, automotive, and construction machinery markets.