The breath taking increase in performance of integrated circuits became possible by continuous miniaturization of CMOS devices. On this exciting path many tough problems were resolved; however, growing technological challenges and soaring costs will gradually bring scaling to an end. This puts foreseeable limitations to the future performance increase, and research on alternative technologies and computational principles becomes important. Spin attracts attention as alternative to the charge degree of freedom for computations and non-volatile memory applications. Silicon as main material of microelectronics is characterized by negligible spin-orbit interaction and zero-spin nuclei and should display long spin coherence times. Combined with the potentially easy integration with CMOS, long spin coherence makes silicon perfectly suited for spin-driven applications, as confirmed by recent impressive demonstrations of spin injection, coherent propagation, and detection. The success of microelectronics technology has been well assisted by smart Technology Computer-Aided Design tools; however, support for spin applications is entirely absent. The objective here is to create, test, and apply a simulation environment for spin-based devices in silicon. Microscopic models describing the physical properties relevant to the spin degree of freedom are developed. Special attention will be paid to investigate, how to increase the spin coherence time. One option is based on completely removing the valley degeneracy in the conduction band by [110] uniaxial stress. Understanding spin-polarized transport in silicon and in compatible hysteretic materials allows using the spin-torque effect to invent, model, and optimize prototypes of switches and memory cells for the 21st century.