"The micro-electronic industry undergoes nowadays a so-called materials revolution. To achieve performance enhancement for the next technology nodes, major innovations are needed beyond a simple down scaling of the device dimensions.Present trends in the industry are first to reduce the thickness of the semiconducting channel along with the overall lateral dimensions of the device, and second, to engineer the channel by introducing high mobility materials other than Si to further increase the device performances and to improve the energy efficiency. Recently, the research community focused on the use of Ge and III-V compound semiconductors such as InGaAs. The first demonstration of Ge and InGaAs “on-insulator” FET has been done using an approach based on direct wafer bonding. Our project proposes to move this strategy well beyond the state of the art and target two separate scientific and technological objectives.Scientific aims are, first, to demonstrate the bonding of III-V quantum-well structures onto silicon with an excellent crystalline quality, second to demonstrate layer transfer for thickness t<5nm and third to fabricate MOSFETs using these ultra thin channels.The technological objective is to propose a path towards a fabrication process appropriate for a high volume industrialization. If the transfer of the InGaAs active layer could be done by grinding the donor wafer, we will here focus on processes where the donor wafer can be reused for economical efficiency. We will demonstrate first, the growth of a donor III-V wafer including both a graded layer on bulk silicon with minimum defect density and a quantum well to be transferred, second, a layer transfer based on ion implantation, thermal splitting and selective etches to transfer the active layer and permit to re-use the donor wafer, and third the regrowth of a III-V heterostructure on the donor wafer that could potentially to be transferred in a next step."