The interest for developing smart systems based on interconnected objects is growing fast (50 billion objects connected in 2020). The main components of “Internet of Things” (IoT) devices are autonomous battery-operated smart embedded systems comprising communication circuits, sensors, computing/processing devices and storage. The key requirements are ultra-low power, high processing capabilities, fast/dense storage, wireless communication, heterogeneous integration, and autonomy. The different functions are so far implemented in separate chips/technologies, which is a bottleneck in terms of costs and miniaturization. To tackle the key issues of monolithic heterogeneous integration, fast yet low power processing, high integration density, fast yet low power storage, the goal of the GREAT STREP project is to co-integrate multiple functions like sensors (“Sensing”), RF receivers (“Communicating”) and logic/memory (“Processing/Storing”) together within CMOS by adapting the STT-MTJs (Magnetic devices) to a single baseline technology. This lead to a unique STT-MTJ cell technology called Multifunctional Standardized (MTJ) Stack (MSS), paving the way to 2.5D self-integrated heterogeneous architectures . The major outputs of GREAT are the technology and the architecture platform for IoT SoCs which provides better integration of embedded & mobile communication systems and a significant decrease of their power consumption. Based on the STT unique set of performances (non-volatility, high speed, infinite endurance and moderate read/write power), GREAT will achieve the same goal as heterogeneous integration of devices but in a much simpler way. The project final objectives are: fabrication of an advanced MSS technology test chip jointly with a system-level simulation and design of a representative M2M IoT platform integrating MSS. The consortium is composed of 9 EU partners led by CEA and of an Advisory Board comprising leaders in IP solutions, IoT, and mobile technologies.