CATHERINE will provide a new unconventional concept for local and chip-level interconnects that will bridge ICT beyond the limits of CMOS technology.The main goals of CATHERINE are:G1) to develop an innovative cost-effective and reliable technological solution for high-performance next-generation nanointerconnects.G2) to develop proof-of-concept nanointerconnects to assess and verify the new proposed solution The expected results of CATHERINE are then summarized by the following points:R1) definition of all causal relations within the design-chain "microstructure characteristics – fabrication process – functional properties"R2) development of multiscale multiphysics simulation models for the prediction of the multifunctional performance of the interconnect and for the EMC analysisR3) development of electromagnetic and multifunctional test procedures and experimental characterization methods R4) manufacturing and testing of proof-of-concept samples of nanointerconnects at laboratory level. The final project product will be:P1) integrated data-base for nanointerconnect designP2) proof-of-concept nanointerconnect The new bottom-up approach proposed by CATHERINE consists in realizing CNT-based nano-interconnects for integrated circuit exploiting two different techniques: (i) a template-based CVD technique that allow high control of the growth of perfect aligned arrays of CNTs. The CNTs are synthesized within the pores of properly designed alumina nanostructures. CNTs wall thickness is controlled by the reaction time, the CNT length by the thickness of alumina nanostructures, the CNT external tube diameter by the nanostructures pore size; (ii) CVD growth of CNTs and carbon nanofibers (CNFs) on substrate patterned with nano-imprint lithography. Both techniques do not require electron beam lithography (EBL) for CNTs growth or substrate preparation. The resulting process is cost-effective and can be easily implemented at industrial scale.