Automotive represents 12% of the EU industrial GDP. 20% of the value of a car is already electronics and 10% of this are IC components. Minimizing costs and space for additional functionality requires further integration. The EU project ATHENIS has successfully addressed System-on-Chip (SoC) integration of CMOS, high voltage and embedded memory for harshest automotive conditions. Further cost reduction will require even higher levels of integration. Therefore ATHENIS_3D will provide the industry's first 3D heterogeneous integration technology platform for harshest automotive conditions with Through Silicon Vias (TSV) and Wafer Level Packaging (WLP). A demonstrator car will prove the functionality of the 3D integrated electronics for an electrical machine with start/stop function and the industry's first 3D/TSV/WLP DCDC converter with integrated inductor for the new 48V standard. Cost savings from integration and a 5x reduction of PCB area at improved reliability will be shown. For this purpose substantial technological barriers such as flipchip mounting of a 90nm CMOS FPGA on a 180nm HVCMOS Si interposer with Integrated Passive Devices (IPD), high density MRAM and magnetic sensors all meeting reliability requirements up to 200C application temperatures have to be mastered for the first time. This will be achieved by combining TSV and HV-CMOS technology from ams with CMOS and Cu-TSV technology from CEA-Leti, MRAM technology from Crocus and WLP technology from Besi. Platform scalability will be proven by flipchip packaging of 14nm CMOS samples on the interposer. New modules for TSVs, MRAM and Passives embedded in TSV technology will be developed to enable 200C applications. Valeo will provide system specifications, development and demo car evaluation. The other partners contribute to the TSV, WLP and IPD technology (FhG, CEA-Leti) and develop the required novel design, simulation, characterization and reliability methods (UNIPI,TUW, FhG, UNIFE, Active, MASER).